Davis Ranney

PhD Candidate in Computer Engineering at Northeastern University focusing on hardware security and microarchitectural side-channels.

I am a computer engineer driven by a long-standing passion for computer architecture and high-performance system design. Recognizing the growing complexity of modern processors, I am pursuing a Ph.D. to gain the research depth necessary to operate at the forefront of digital architectural innovation. My dissertation research centers on hardware security and microarchitectural side-channel attacks, an area I believe is critically under-emphasized in performance-driven designs. By rigorously analyzing new attack strategies and mitigating architectural vulnerabilities, my work advocates for security as a first-class design constraint in next-generation systems.

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Timeline

A chronological view of my academic and professional milestones. Entries related to research are clickable and link to the detailed sections.

  1. Sep 2025

    research

    Started Research on RISC-V architecture

    Currently exploring methods of fuzzing, novel GPU architectures, and cache side-channel attacks on RISC-V platforms.

  2. May 2025

    research

    Presented USBSnoop at HOST2025↗

    Presented practical attacks against USB network adapters, and mice and keyboards using USB congestion-based side channels to compromise user privacy.

  3. Dec 2023

    educationBoston, MA

    Completed PhD Qualifying Exam

    Successfully presented and defended my initial research project about USB side-channels to achieve PhD candidacy.

  4. Sep 2023

    research

    Started Research on PQC Side-Channels↗

    Experimental study on fault and side-channel attacks on ML-KEM verification with various levels of side-channel protection including high-level masking.

  5. May 2023

    research

    Started Research on USBSnoop↗

    Inspired by congestion-based side-channels on internal bus interfaces, I was inspired to pursue research that attacked the USB standard and its inherent use of hubs.

  6. Sep 2022

    educationBoston, MA

    Started PhD in Computer Engineering at Northeastern University

    Began doctoral research in hardware architecture and security.

  7. May 2022

    educationPhiladelphia, PA

    Graduated Cum Lade from Drexel University

    Completed a five-year program where I received my MS in Computer Science, BS in Computer Engineering, completed the honors program, and a minor in VR/Immersive Media.

  8. Mar 2021

    industryRemote

    Hardware Validation Engineering Co-op at Apple, Inc

    Tested various M-series MacBook prototypes and designed several data visualizations to help my team improve their comprehension of important test results.

  9. Mar 2020

    industryCamden, NJ

    FPGA and ASIC Design Co-op at L3Harris Technologies

    Developed a high-performance encryption interface for SSDs using high-level synthesis (HLS). Also received a Secret Security Clearance.

  10. Sep 2019

    educationPhiladelphia, PA

    Started MS in Computer Science

    Was admitted to Drexel's BS/MS track and was able to cross colleges for a wider discipline.

  11. Sep 2018

    industryHarleysville, PA

    Engineering Co-op at Ametek PDS

    Worked on short and long-duration power testing and embedded device programming for large power delivery systems.

  12. Aug 2017

    educationPhiladelphia, PA

    Started at Drexel University

    Started my BS in Computer Engineering program. Also was admitted to Drexel's Honors program.

  13. May 2017

    educationDenver, CO

    Graduated from J K Mullen High School

    Graduated with honors and a 4.48 GPA. Was the president of the Robotics and Engineering club.